281 lines
11 KiB
Plaintext
281 lines
11 KiB
Plaintext
/*
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* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <torch/all.h>
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#include <ATen/cuda/CUDAContext.h>
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#include <c10/cuda/CUDAGuard.h>
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#include "cutlass_extensions/common.hpp"
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#include "cutlass/cutlass.h"
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#include "cutlass/gemm/collective/collective_builder.hpp"
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#include "cutlass/epilogue/collective/collective_builder.hpp"
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#include "cutlass/gemm/device/gemm_universal_adapter.h"
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#include "cutlass/gemm/kernel/gemm_universal.hpp"
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#include "cutlass/util/packed_stride.hpp"
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using namespace cute;
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#if defined(CUTLASS_ARCH_MMA_SM100_SUPPORTED)
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// Kernel Perf config
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template <typename T>
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struct KernelTraits;
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template <>
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struct KernelTraits<float> {
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using MmaTileShape = Shape<_128, _128, _256>;
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using ClusterShape = Shape<_1, _1, _1>;
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using PerSmTileShape_MNK = Shape<_128, _128, _256>;
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};
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template <>
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struct KernelTraits<cutlass::half_t> {
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using MmaTileShape = Shape<_256, _256, _256>;
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using ClusterShape = Shape<_4, _4, _1>;
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using PerSmTileShape_MNK = Shape<_128, _256, _256>;
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};
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template <>
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struct KernelTraits<cutlass::bfloat16_t> {
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using MmaTileShape = Shape<_256, _256, _256>;
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using ClusterShape = Shape<_4, _4, _1>;
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using PerSmTileShape_MNK = Shape<_128, _256, _256>;
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};
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template <typename T>
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struct Fp4GemmSm100 {
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// A matrix configuration
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using ElementA = cutlass::nv_float4_t<cutlass::float_e2m1_t>;
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using LayoutATag = cutlass::layout::RowMajor;
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static constexpr int AlignmentA = 32;
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// B matrix configuration
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using ElementB = cutlass::nv_float4_t<cutlass::float_e2m1_t>;
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using LayoutBTag = cutlass::layout::ColumnMajor;
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static constexpr int AlignmentB = 32;
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// C/D matrix configuration
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using ElementD = T;
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using ElementC = T;
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using LayoutCTag = cutlass::layout::RowMajor;
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using LayoutDTag = cutlass::layout::RowMajor;
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static constexpr int AlignmentD = 128 / cutlass::sizeof_bits<ElementD>::value;
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static constexpr int AlignmentC = 128 / cutlass::sizeof_bits<ElementC>::value;
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// Kernel functional config
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using ElementAccumulator = float;
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using ArchTag = cutlass::arch::Sm100;
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using OperatorClass = cutlass::arch::OpClassBlockScaledTensorOp;
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// Kernel Perf config
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using MmaTileShape = typename KernelTraits<T>::MmaTileShape;
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using ClusterShape = typename KernelTraits<T>::ClusterShape;
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using PerSmTileShape_MNK = typename KernelTraits<T>::PerSmTileShape_MNK;
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using CollectiveEpilogue =
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typename cutlass::epilogue::collective::CollectiveBuilder<
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ArchTag, OperatorClass, PerSmTileShape_MNK, ClusterShape,
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cutlass::epilogue::collective::EpilogueTileAuto, ElementAccumulator,
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ElementAccumulator, ElementC, LayoutCTag, AlignmentC, ElementD,
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LayoutDTag, AlignmentD,
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cutlass::epilogue::collective::EpilogueScheduleAuto>::CollectiveOp;
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using CollectiveMainloop =
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typename cutlass::gemm::collective::CollectiveBuilder<
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ArchTag, OperatorClass, ElementA, LayoutATag, AlignmentA, ElementB,
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LayoutBTag, AlignmentB, ElementAccumulator, MmaTileShape,
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ClusterShape,
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cutlass::gemm::collective::StageCountAutoCarveout<static_cast<int>(
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sizeof(typename CollectiveEpilogue::SharedStorage))>,
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cutlass::gemm::collective::KernelScheduleAuto>::CollectiveOp;
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using GemmKernel = cutlass::gemm::kernel::GemmUniversal<
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Shape<int, int, int, int>, CollectiveMainloop, CollectiveEpilogue, void>;
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using Gemm = cutlass::gemm::device::GemmUniversalAdapter<GemmKernel>;
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using StrideA = typename Gemm::GemmKernel::StrideA;
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using LayoutA = decltype(cute::make_layout(make_shape(0, 0, 0), StrideA{}));
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using LayoutSFA = typename Gemm::GemmKernel::CollectiveMainloop::LayoutSFA;
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using StrideB = typename Gemm::GemmKernel::StrideB;
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using LayoutB = decltype(cute::make_layout(make_shape(0, 0, 0), StrideB{}));
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using LayoutSFB = typename Gemm::GemmKernel::CollectiveMainloop::LayoutSFB;
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using StrideC = typename Gemm::GemmKernel::StrideC;
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using LayoutC = decltype(cute::make_layout(make_shape(0, 0, 0), StrideC{}));
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using StrideD = typename Gemm::GemmKernel::StrideD;
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using LayoutD = decltype(cute::make_layout(make_shape(0, 0, 0), StrideD{}));
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};
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template <typename T>
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typename T::Gemm::Arguments args_from_options(
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at::Tensor& D, at::Tensor const& A, at::Tensor const& B,
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at::Tensor const& A_sf, at::Tensor const& B_sf, at::Tensor const& alpha,
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int64_t M, int64_t N, int64_t K) {
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using ElementA = typename T::Gemm::ElementA;
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using ElementB = typename T::Gemm::ElementB;
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using ElementSFA = cutlass::float_ue4m3_t;
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using ElementSFB = cutlass::float_ue4m3_t;
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using ElementD = typename T::Gemm::ElementD;
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using ElementCompute = float;
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using StrideA = typename T::StrideA;
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using StrideB = typename T::StrideB;
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using StrideD = typename T::StrideD;
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using Sm100BlkScaledConfig =
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typename T::Gemm::GemmKernel::CollectiveMainloop::Sm100BlkScaledConfig;
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int m = static_cast<int>(M);
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int n = static_cast<int>(N);
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int k = static_cast<int>(K);
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auto stride_A = cutlass::make_cute_packed_stride(StrideA{}, {m, k, 1});
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auto stride_B = cutlass::make_cute_packed_stride(StrideB{}, {n, k, 1});
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auto stride_D = cutlass::make_cute_packed_stride(StrideD{}, {m, n, 1});
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auto layout_SFA = Sm100BlkScaledConfig::tile_atom_to_shape_SFA(
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cute::make_shape(m, n, k, 1));
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auto layout_SFB = Sm100BlkScaledConfig::tile_atom_to_shape_SFB(
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cute::make_shape(m, n, k, 1));
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typename T::Gemm::Arguments arguments{
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cutlass::gemm::GemmUniversalMode::kGemm,
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{m, n, k, 1},
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{// Mainloop arguments
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static_cast<ElementA const*>(A.data_ptr()), stride_A,
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static_cast<ElementB const*>(B.data_ptr()), stride_B,
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static_cast<ElementSFA const*>(A_sf.data_ptr()), layout_SFA,
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static_cast<ElementSFB const*>(B_sf.data_ptr()), layout_SFB},
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{ // Epilogue arguments
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{}, // epilogue.thread
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static_cast<ElementD const*>(D.data_ptr()),
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stride_D,
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static_cast<ElementD*>(D.data_ptr()),
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stride_D}};
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auto& fusion_args = arguments.epilogue.thread;
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fusion_args.alpha_ptr = static_cast<ElementCompute const*>(alpha.data_ptr());
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return arguments;
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}
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template <typename T>
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void runGemm(at::Tensor& D, at::Tensor const& A, at::Tensor const& B,
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at::Tensor const& A_sf, at::Tensor const& B_sf,
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at::Tensor const& alpha, int64_t m, int64_t n, int64_t k,
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cudaStream_t stream) {
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typename Fp4GemmSm100<T>::Gemm gemm;
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auto arguments =
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args_from_options<Fp4GemmSm100<T>>(D, A, B, A_sf, B_sf, alpha, m, n, k);
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size_t workspace_size = Fp4GemmSm100<T>::Gemm::get_workspace_size(arguments);
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auto const workspace_options =
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torch::TensorOptions().dtype(torch::kUInt8).device(A.device());
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auto workspace = torch::empty(workspace_size, workspace_options);
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CUTLASS_CHECK(gemm.can_implement(arguments));
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CUTLASS_CHECK(gemm.initialize(arguments, workspace.data_ptr(), stream));
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CUTLASS_CHECK(gemm.run(arguments, workspace.data_ptr(), stream));
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}
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#else
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template <typename T>
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void runGemm(at::Tensor& D, at::Tensor const& A, at::Tensor const& B,
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at::Tensor const& A_sf, at::Tensor const& B_sf,
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at::Tensor const& alpha, int64_t m, int64_t n, int64_t k,
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cudaStream_t stream) {
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TORCH_CHECK(false, "Unsupported CUTLASS version. Set VLLM_CUTLASS_SRC_DIR to "
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"a CUTLASS 3.8 source directory to enable support.");
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}
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#endif // defined(CUTLASS_ARCH_MMA_SM100_SUPPORTED)
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#define CHECK_TYPE(x, st, m) \
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TORCH_CHECK(x.scalar_type() == st, "Inconsistency of Tensor type:", m)
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#define CHECK_TH_CUDA(x, m) TORCH_CHECK(x.is_cuda(), m, "must be a CUDA tensor")
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#define CHECK_CONTIGUOUS(x, m) \
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TORCH_CHECK(x.is_contiguous(), m, "must be contiguous")
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#define CHECK_INPUT(x, st, m) \
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CHECK_TH_CUDA(x, m); \
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CHECK_CONTIGUOUS(x, m); \
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CHECK_TYPE(x, st, m)
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constexpr auto FLOAT4_E2M1X2 = at::ScalarType::Byte;
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constexpr auto SF_DTYPE = at::ScalarType::Float8_e4m3fn;
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void cutlass_scaled_fp4_mm_sm100a(torch::Tensor& D, torch::Tensor const& A,
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torch::Tensor const& B,
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torch::Tensor const& A_sf,
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torch::Tensor const& B_sf,
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torch::Tensor const& alpha) {
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CHECK_INPUT(A, FLOAT4_E2M1X2, "a");
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CHECK_INPUT(B, FLOAT4_E2M1X2, "b");
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CHECK_INPUT(A_sf, SF_DTYPE, "scale_a");
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CHECK_INPUT(B_sf, SF_DTYPE, "scale_b");
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CHECK_INPUT(alpha, at::ScalarType::Float, "alpha");
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TORCH_CHECK(A.dim() == 2, "a must be a matrix");
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TORCH_CHECK(B.dim() == 2, "b must be a matrix");
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TORCH_CHECK(A.sizes()[1] == B.sizes()[1],
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"a and b shapes cannot be multiplied (", A.sizes()[0], "x",
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A.sizes()[1], " and ", B.sizes()[0], "x", B.sizes()[1], ")");
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auto const m = A.sizes()[0];
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auto const n = B.sizes()[0];
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auto const k = A.sizes()[1] * 2;
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constexpr int alignment = 32;
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TORCH_CHECK(k % alignment == 0, "Expected k to be divisible by ", alignment,
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", but got a shape: (", A.sizes()[0], "x", A.sizes()[1],
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"), k: ", k, ".");
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TORCH_CHECK(n % alignment == 0, "Expected n to be divisible by ", alignment,
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", but got b shape: (", B.sizes()[0], "x", B.sizes()[1], ").");
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auto round_up = [](int x, int y) { return (x + y - 1) / y * y; };
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int rounded_m = round_up(m, 128);
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int rounded_n = round_up(n, 128);
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// Since k is divisible by 32 (alignment), k / 16 is guaranteed to be an
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// integer.
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int rounded_k = round_up(k / 16, 4);
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TORCH_CHECK(A_sf.dim() == 2, "scale_a must be a matrix");
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TORCH_CHECK(B_sf.dim() == 2, "scale_b must be a matrix");
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TORCH_CHECK(A_sf.sizes()[1] == B_sf.sizes()[1],
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"scale_a and scale_b shapes cannot be multiplied (",
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A_sf.sizes()[0], "x", A_sf.sizes()[1], " and ", B_sf.sizes()[0],
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"x", B_sf.sizes()[1], ")");
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TORCH_CHECK(A_sf.sizes()[0] == rounded_m && A_sf.sizes()[1] == rounded_k,
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"scale_a must be padded and swizzled to a shape (", rounded_m,
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"x", rounded_k, "), but got a shape (", A_sf.sizes()[0], "x",
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A_sf.sizes()[1], ")");
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TORCH_CHECK(B_sf.sizes()[0] == rounded_n && B_sf.sizes()[1] == rounded_k,
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"scale_b must be padded and swizzled to a shape (", rounded_n,
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"x", rounded_k, "), but got a shape (", B_sf.sizes()[0], "x",
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B_sf.sizes()[1], ")");
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auto out_dtype = D.dtype();
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at::cuda::CUDAGuard device_guard{(char)A.get_device()};
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const cudaStream_t stream = at::cuda::getCurrentCUDAStream(A.get_device());
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if (out_dtype == at::ScalarType::Half) {
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runGemm<cutlass::half_t>(D, A, B, A_sf, B_sf, alpha, m, n, k, stream);
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} else if (out_dtype == at::ScalarType::BFloat16) {
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runGemm<cutlass::bfloat16_t>(D, A, B, A_sf, B_sf, alpha, m, n, k, stream);
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} else if (out_dtype == at::ScalarType::Float) {
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runGemm<float>(D, A, B, A_sf, B_sf, alpha, m, n, k, stream);
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} else {
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TORCH_CHECK(false, "Unsupported output data type of nvfp4 mm");
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}
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}
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