65 lines
1.6 KiB
Plaintext
65 lines
1.6 KiB
Plaintext
/*
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Copied from https://github.com/turboderp/exllamav2
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*/
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#ifndef _compat_cuh
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#define _compat_cuh
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namespace vllm {
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namespace gptq {
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// atomicAdd for half types, to support CC < 7.x
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__device__ __forceinline__ void atomicAdd_half(half* address, half val) {
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unsigned int* address_as_ui =
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(unsigned int*)((char*)address - ((size_t)address & 2));
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unsigned int old = *address_as_ui;
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unsigned int assumed;
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do {
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assumed = old;
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__half_raw hsum;
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hsum.x = (size_t)address & 2 ? (old >> 16) : (old & 0xffff);
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half tmpres = __hadd(hsum, val);
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hsum = __half_raw(tmpres);
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old = (size_t)address & 2 ? (old & 0xffff) | (hsum.x << 16)
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: (old & 0xffff0000) | hsum.x;
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old = atomicCAS(address_as_ui, assumed, old);
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} while (assumed != old);
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}
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// atomicAdd for half2 types
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__device__ __forceinline__ void atomicAdd_half2(half2* address, half2 val) {
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unsigned int* address_as_ui = (unsigned int*)address;
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unsigned int old = *address_as_ui;
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unsigned int assumed;
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do {
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assumed = old;
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half2 old_val = *((half2*)&old);
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half2 new_val = __hadd2(old_val, val);
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old = atomicCAS(address_as_ui, assumed, *((unsigned int*)&new_val));
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} while (assumed != old);
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}
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//
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#if defined(__CUDA_ARCH__) || defined(USE_ROCM)
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#if __CUDA_ARCH__ < 700 || defined(USE_ROCM)
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__device__ __forceinline__ void atomicAdd(half* address, half val) {
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atomicAdd_half(address, val);
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}
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#if __CUDA_ARCH__ < 600 || defined(USE_ROCM)
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__device__ __forceinline__ void atomicAdd(half2* address, half2 val) {
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atomicAdd_half2(address, val);
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}
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#endif
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#endif
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#endif
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} // namespace gptq
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} // namespace vllm
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#endif
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