Cyrus Leung 59a0192fb9

[Core] Interface for accessing model from VllmRunner (#10353) ...

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

2025-01-20 15:00:59 +08:00

..

__init__.py

[CI/Build] Move test_utils.py to tests/utils.py (#4425)

2024-05-13 23:50:09 +09:00

test_bitsandbytes.py

[Bugfix] bitsandbytes models fail to run pipeline parallel (#10200)

2024-11-13 09:56:39 -07:00

test_compressed_tensors.py

[Core] Interface for accessing model from VllmRunner (#10353)

2025-01-20 15:00:59 +08:00

test_configs.py

[Model] Add user-configurable task for models that support both generation and embedding (#9424)

2024-10-18 11:31:58 -07:00

test_cpu_offload.py

[ci][test] adjust max wait time for cpu offloading test (#7709)

2024-08-20 17:12:44 -07:00

test_experts_int8.py

[Kernel] W8A16 Int8 inside FusedMoE (#7415)

2024-08-16 10:06:51 -07:00

test_fp8.py

[Core] Interface for accessing model from VllmRunner (#10353)

2025-01-20 15:00:59 +08:00

test_ipex_quant.py

[Hardware][XPU] AWQ/GPTQ support for xpu backend (#10107)

2024-11-18 11:18:05 -07:00

test_lm_head.py

[Core] Interface for accessing model from VllmRunner (#10353)

2025-01-20 15:00:59 +08:00

test_quark.py

[Core] Interface for accessing model from VllmRunner (#10353)

2025-01-20 15:00:59 +08:00

test_register_quantization_config.py

[Misc] Support register quantization method out-of-tree (#11969)

2025-01-18 16:13:16 -08:00

utils.py

[torch.compile] limit inductor threads and lazy import quant (#10482)

2024-11-20 18:36:33 -08:00