2023-02-16 07:47:03 +00:00
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#include <torch/extension.h>
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#include <ATen/cuda/CUDAContext.h>
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2023-09-02 14:59:47 +09:00
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#include "dispatch_utils.h"
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2023-02-18 19:22:57 +00:00
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#include <algorithm>
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2023-02-16 07:47:03 +00:00
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#include <cassert>
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#include <map>
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#include <vector>
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2023-02-16 07:47:03 +00:00
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2023-03-10 09:58:21 -08:00
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void swap_blocks(
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2023-02-16 07:47:03 +00:00
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torch::Tensor& src,
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torch::Tensor& dst,
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const std::map<int64_t, int64_t>& block_mapping) {
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torch::Device src_device = src.device();
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torch::Device dst_device = dst.device();
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cudaMemcpyKind memcpy_type;
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if (src_device.is_cuda() && dst_device.is_cuda()) {
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TORCH_CHECK(
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src_device.index() == dst_device.index(),
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"src and dst must be on the same GPU");
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memcpy_type = cudaMemcpyDeviceToDevice;
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} else if (src_device.is_cuda() && dst_device.is_cpu()) {
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memcpy_type = cudaMemcpyDeviceToHost;
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} else if (src_device.is_cpu() && dst_device.is_cuda()) {
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memcpy_type = cudaMemcpyHostToDevice;
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} else {
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TORCH_CHECK(false, "Invalid device combination");
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2023-02-16 07:47:03 +00:00
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}
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void *src_ptr = src.data_ptr();
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void *dst_ptr = dst.data_ptr();
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const int64_t block_size_in_bytes = src.element_size() * src[0].numel();
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const cudaStream_t stream = at::cuda::getCurrentCUDAStream();
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// NOTE(woosuk): This can be slow if the number of blocks is large.
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for (const auto& pair : block_mapping) {
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int64_t src_block_number = pair.first;
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int64_t dst_block_number = pair.second;
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int64_t src_offset = src_block_number * block_size_in_bytes;
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int64_t dst_offset = dst_block_number * block_size_in_bytes;
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cudaMemcpyAsync(
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dst_ptr + dst_offset,
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src_ptr + src_offset,
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block_size_in_bytes,
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memcpy_type,
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stream);
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}
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}
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2023-02-18 19:22:57 +00:00
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2023-06-17 03:07:40 -07:00
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namespace vllm {
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// Grid: (num_layers, num_pairs)
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template<typename scalar_t>
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__global__ void copy_blocks_kernel(
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int64_t* key_cache_ptrs,
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int64_t* value_cache_ptrs,
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const int64_t* __restrict__ block_mapping,
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const int numel_per_block) {
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const int layer_idx = blockIdx.x;
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const int pair_idx = blockIdx.y;
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scalar_t* key_cache = reinterpret_cast<scalar_t*>(key_cache_ptrs[layer_idx]);
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scalar_t* value_cache = reinterpret_cast<scalar_t*>(value_cache_ptrs[layer_idx]);
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int64_t src_block_number = block_mapping[2 * pair_idx];
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int64_t dst_block_number = block_mapping[2 * pair_idx + 1];
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const int64_t src_block_offset = src_block_number * numel_per_block;
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const int64_t dst_block_offset = dst_block_number * numel_per_block;
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for (int i = threadIdx.x; i < numel_per_block; i += blockDim.x) {
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int64_t src_offset = src_block_offset + i;
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int64_t dst_offset = dst_block_offset + i;
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key_cache[dst_offset] = key_cache[src_offset];
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}
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for (int i = threadIdx.x; i < numel_per_block; i += blockDim.x) {
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int64_t src_offset = src_block_offset + i;
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int64_t dst_offset = dst_block_offset + i;
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value_cache[dst_offset] = value_cache[src_offset];
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}
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}
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} // namespace vllm
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void copy_blocks(
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std::vector<torch::Tensor>& key_caches,
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std::vector<torch::Tensor>& value_caches,
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const std::map<int64_t, std::vector<int64_t>>& block_mapping) {
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int num_layers = key_caches.size();
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TORCH_CHECK(num_layers == value_caches.size());
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if (num_layers == 0) {
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return;
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}
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torch::Device cache_device = key_caches[0].device();
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TORCH_CHECK(cache_device.is_cuda());
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// Create data structures for the kernel.
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// Create an array of pointers to the key and value caches.
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int64_t key_cache_ptrs[num_layers];
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int64_t value_cache_ptrs[num_layers];
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for (int layer_idx = 0; layer_idx < num_layers; ++layer_idx) {
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key_cache_ptrs[layer_idx] = reinterpret_cast<int64_t>(key_caches[layer_idx].data_ptr());
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value_cache_ptrs[layer_idx] = reinterpret_cast<int64_t>(value_caches[layer_idx].data_ptr());
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}
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// Create block mapping array.
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std::vector<int64_t> block_mapping_vec;
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for (const auto& pair : block_mapping) {
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int64_t src_block_number = pair.first;
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for (int64_t dst_block_number : pair.second) {
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block_mapping_vec.push_back(src_block_number);
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block_mapping_vec.push_back(dst_block_number);
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}
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}
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int64_t* block_mapping_array = block_mapping_vec.data();
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int num_pairs = block_mapping_vec.size() / 2;
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// Move the data structures to the GPU.
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// NOTE: This synchronizes the CPU and GPU.
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torch::Tensor key_cache_ptrs_tensor = torch::from_blob(
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key_cache_ptrs, {num_layers}, torch::kInt64).to(cache_device);
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torch::Tensor value_cache_ptrs_tensor = torch::from_blob(
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value_cache_ptrs, {num_layers}, torch::kInt64).to(cache_device);
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torch::Tensor block_mapping_tensor = torch::from_blob(
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block_mapping_array, {2 * num_pairs}, torch::kInt64).to(cache_device);
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// Launch the kernel.
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const int numel_per_block = key_caches[0][0].numel();
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dim3 grid(num_layers, num_pairs);
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dim3 block(std::min(1024, numel_per_block));
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const cudaStream_t stream = at::cuda::getCurrentCUDAStream();
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VLLM_DISPATCH_FLOATING_TYPES(
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key_caches[0].scalar_type(), "copy_blocks_kernel", ([&] {
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vllm::copy_blocks_kernel<scalar_t><<<grid, block, 0, stream>>>(
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key_cache_ptrs_tensor.data_ptr<int64_t>(),
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value_cache_ptrs_tensor.data_ptr<int64_t>(),
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block_mapping_tensor.data_ptr<int64_t>(),
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numel_per_block);
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}));
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}
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namespace vllm {
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2023-03-13 13:48:38 -07:00
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2023-02-18 19:22:57 +00:00
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template<typename scalar_t>
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__global__ void reshape_and_cache_kernel(
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const scalar_t* __restrict__ key, // [num_tokens, num_heads, head_size]
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const scalar_t* __restrict__ value, // [num_tokens, num_heads, head_size]
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scalar_t* __restrict__ key_cache, // [num_blocks, num_heads, head_size/x, block_size, x]
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scalar_t* __restrict__ value_cache, // [num_blocks, num_heads, head_size, block_size]
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const int64_t* __restrict__ slot_mapping, // [num_tokens]
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const int key_stride,
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const int value_stride,
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const int num_heads,
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const int head_size,
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const int block_size,
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const int x) {
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const int64_t token_idx = blockIdx.x;
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const int64_t slot_idx = slot_mapping[token_idx];
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if (slot_idx < 0) {
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// Padding token that should be ignored.
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return;
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}
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const int64_t block_idx = slot_idx / block_size;
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const int64_t block_offset = slot_idx % block_size;
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const int n = num_heads * head_size;
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for (int i = threadIdx.x; i < n; i += blockDim.x) {
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const int64_t src_key_idx = token_idx * key_stride + i;
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const int64_t src_value_idx = token_idx * value_stride + i;
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const int head_idx = i / head_size;
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const int head_offset = i % head_size;
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const int x_idx = head_offset / x;
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const int x_offset = head_offset % x;
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const int64_t tgt_key_idx = block_idx * num_heads * (head_size / x) * block_size * x
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+ head_idx * (head_size / x) * block_size * x
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+ x_idx * block_size * x
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+ block_offset * x
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+ x_offset;
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const int64_t tgt_value_idx = block_idx * num_heads * head_size * block_size
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+ head_idx * head_size * block_size
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+ head_offset * block_size
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+ block_offset;
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key_cache[tgt_key_idx] = key[src_key_idx];
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value_cache[tgt_value_idx] = value[src_value_idx];
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}
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}
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2023-06-17 03:07:40 -07:00
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} // namespace vllm
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void reshape_and_cache(
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torch::Tensor& key, // [num_tokens, num_heads, head_size]
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torch::Tensor& value, // [num_tokens, num_heads, head_size]
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torch::Tensor& key_cache, // [num_blocks, num_heads, head_size/x, block_size, x]
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torch::Tensor& value_cache, // [num_blocks, num_heads, head_size, block_size]
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torch::Tensor& slot_mapping) // [num_tokens]
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{
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int num_tokens = key.size(0);
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int num_heads = key.size(1);
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int head_size = key.size(2);
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int block_size = key_cache.size(3);
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int x = key_cache.size(4);
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int key_stride = key.stride(0);
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int value_stride = value.stride(0);
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dim3 grid(num_tokens);
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dim3 block(std::min(num_heads * head_size, 512));
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const cudaStream_t stream = at::cuda::getCurrentCUDAStream();
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VLLM_DISPATCH_FLOATING_TYPES(
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key.scalar_type(),
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"reshape_and_cache_kernel",
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[&] {
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vllm::reshape_and_cache_kernel<scalar_t><<<grid, block, 0, stream>>>(
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key.data_ptr<scalar_t>(),
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value.data_ptr<scalar_t>(),
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key_cache.data_ptr<scalar_t>(),
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value_cache.data_ptr<scalar_t>(),
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slot_mapping.data_ptr<int64_t>(),
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key_stride,
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value_stride,
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num_heads,
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head_size,
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block_size,
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x);
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});
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}
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namespace vllm {
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// Grid: (num_blocks, block_size).
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template<typename scalar_t>
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__global__ void gather_cached_kv_kernel(
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scalar_t* __restrict__ key, // [num_tokens, [stride], num_heads, head_size]
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scalar_t* __restrict__ value, // [num_tokens, [stride], num_heads, head_size]
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const scalar_t* __restrict__ key_cache, // [num_blocks, num_heads, head_size/x, block_size, x]
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const scalar_t* __restrict__ value_cache, // [num_blocks, num_heads, head_size, block_size]
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const int* __restrict__ slot_mapping, // [num_tokens]
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const int key_stride,
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const int value_stride,
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const int num_heads,
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const int head_size,
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const int block_size,
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const int x) {
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const int token_idx = blockIdx.x;
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const int slot_idx = slot_mapping[token_idx];
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const int block_idx = slot_idx / block_size;
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const int block_offset = slot_idx % block_size;
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const int num_tokens = num_heads * head_size;
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for (int i = threadIdx.x; i < num_tokens; i += blockDim.x) {
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const int tgt_key_idx = token_idx * key_stride + i;
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const int tgt_value_idx = token_idx * value_stride + i;
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const int head_idx = i / head_size;
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const int head_offset = i % head_size;
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const int x_idx = head_offset / x; // the offset of the [head_size/x] dimension
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const int x_offset = head_offset % x;
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const int src_key_idx = block_idx * num_heads * (head_size / x) * block_size * x
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+ head_idx * (head_size / x) * block_size * x
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+ x_idx * block_size * x
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+ block_offset * x
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+ x_offset;
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const int src_value_idx = block_idx * num_heads * head_size * block_size
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+ head_idx * head_size * block_size
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+ head_offset * block_size
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+ block_offset;
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key[tgt_key_idx] = __ldg(&key_cache[src_key_idx]);
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value[tgt_value_idx] = __ldg(&value_cache[src_value_idx]);
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}
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}
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template <typename scalar_t>
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__global__ void gather_cached_kv_kernel_optimized(
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scalar_t *__restrict__ key, // [num_tokens, [stride], num_heads, head_size]
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scalar_t *__restrict__ value, // [num_tokens, [stride], num_heads, head_size]
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const scalar_t *__restrict__ key_cache, // [num_blocks, num_heads, head_size/x, block_size, x]
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const scalar_t *__restrict__ value_cache, // [num_blocks, num_heads, head_size, block_size]
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const int *__restrict__ slot_mapping, // [num_tokens]
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const int key_stride,
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const int value_stride,
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const int num_heads,
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const int head_size,
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const int block_size,
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const int x)
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{
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const int token_idx = blockIdx.x;
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const int slot_idx = slot_mapping[token_idx];
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const int block_idx = slot_idx / block_size;
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const int block_offset = slot_idx % block_size;
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const int dim = num_heads * head_size;
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assert(dim % 4 == 0); // this is true for known use cases
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const int unroll_factor = 4;
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const int unrolled_dim = dim / unroll_factor;
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for (int i = threadIdx.x; i < unrolled_dim; i += blockDim.x)
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{
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int tgt_key_indices[unroll_factor];
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int tgt_value_indices[unroll_factor];
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int src_key_indices[unroll_factor];
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int src_value_indices[unroll_factor];
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scalar_t keys_to_store[unroll_factor];
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scalar_t values_to_store[unroll_factor];
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#pragma unroll
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for (int j = 0; j < unroll_factor; ++j)
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{
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int index = i + j * unrolled_dim;
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const int tgt_key_idx = token_idx * key_stride + index;
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const int tgt_value_idx = token_idx * value_stride + index;
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const int head_idx = index / head_size;
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const int head_offset = index % head_size;
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const int x_idx = head_offset / x;
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const int x_offset = head_offset % x;
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const int src_key_idx = block_idx * num_heads * (head_size / x) * block_size * x
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+ head_idx * (head_size / x) * block_size * x
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+ x_idx * block_size * x
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+ block_offset * x
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+ x_offset;
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const int src_value_idx = block_idx * num_heads * head_size * block_size
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+ head_idx * head_size * block_size
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+ head_offset * block_size
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+ block_offset;
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tgt_key_indices[j] = tgt_key_idx;
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tgt_value_indices[j] = tgt_value_idx;
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src_key_indices[j] = src_key_idx;
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src_value_indices[j] = src_value_idx;
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keys_to_store[j] = __ldg(&key_cache[src_key_idx]);
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values_to_store[j] = __ldg(&value_cache[src_value_idx]);
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}
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#pragma unroll
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for (int j = 0; j < unroll_factor; ++j)
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{
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key[tgt_key_indices[j]] = keys_to_store[j];
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value[tgt_value_indices[j]] = values_to_store[j];
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}
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}
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}
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2023-06-17 03:07:40 -07:00
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} // namespace vllm
|
2023-03-13 13:48:38 -07:00
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|
2023-04-10 18:22:49 -07:00
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|
void gather_cached_kv(
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|
torch::Tensor& key, // [out] [num_tokens, num_heads, head_size]
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|
torch::Tensor& value, // [out] [num_tokens, num_heads, head_size]
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|
torch::Tensor& key_cache, // [in] [num_blocks, num_heads, head_size/x, block_size, x]
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|
torch::Tensor& value_cache, // [in] [num_blocks, num_heads, head_size, block_size]
|
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|
|
torch::Tensor& slot_mapping) // [in] [num_tokens]
|
|
|
|
{
|
|
|
|
int num_tokens = key.size(0);
|
|
|
|
int num_heads = key.size(1);
|
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|
|
int head_size = key.size(2);
|
|
|
|
int block_size = key_cache.size(3);
|
|
|
|
int x = key_cache.size(4);
|
|
|
|
|
|
|
|
int key_stride = key.stride(0);
|
|
|
|
int value_stride = value.stride(0);
|
|
|
|
|
|
|
|
dim3 grid(num_tokens);
|
|
|
|
dim3 block(std::min(num_heads * head_size, 512));
|
|
|
|
const cudaStream_t stream = at::cuda::getCurrentCUDAStream();
|
2023-09-02 14:59:47 +09:00
|
|
|
VLLM_DISPATCH_FLOATING_TYPES(
|
2023-04-10 18:22:49 -07:00
|
|
|
key.scalar_type(),
|
|
|
|
"gather_cached_kv_kernel_optimized",
|
|
|
|
[&] {
|
2023-06-17 03:07:40 -07:00
|
|
|
vllm::gather_cached_kv_kernel_optimized<scalar_t><<<grid, block, 0, stream>>>(
|
2023-04-10 18:22:49 -07:00
|
|
|
key.data_ptr<scalar_t>(),
|
|
|
|
value.data_ptr<scalar_t>(),
|
|
|
|
key_cache.data_ptr<scalar_t>(),
|
|
|
|
value_cache.data_ptr<scalar_t>(),
|
|
|
|
slot_mapping.data_ptr<int>(),
|
|
|
|
key_stride,
|
|
|
|
value_stride,
|
|
|
|
num_heads,
|
|
|
|
head_size,
|
|
|
|
block_size,
|
|
|
|
x);
|
|
|
|
});
|
|
|
|
}
|